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  ? semiconductor components industries, llc, 2011 january, 2011 ? rev. 5 1 publication order number: ncp508/d ncp508 very low noise, fast turn on, 50 ma low dropout voltage regulator the ncp508 is a 50 ma low noise voltage regulator, designed to exhibit fast turn on time and high ripple rejection. each device contains a voltage reference unit, an error amplifier, a pmos power transistor, resistors for setting output voltage, current limit, and temperature limit protection circuits. the ncp508 has been designed for use with ceramic capacitors. the device is housed in sc ? 88a and wdfn6 1.5x1.5 packages. standard voltage versions are 1.5, 1.8, 2.5, 2.8, 3.0, and 3.3. other voltages are available in 100 mv steps. features ? very low noise at 39  vrms without a bypass capacitor ? high ripple rejection of 70 db at 1 khz ? low dropout voltage of 140 mv (typ) at 30 ma ? tight load regulation, typically 6 mv for  i out = 50 ma ? fast enable turn ? on time of 20  sec ? logic level enable ? esr can vary from a few m  to 3  ? these are pb ? free devices typical applications ? rf subsystems in handsets ? noise sensitive circuits; vcos, pll v out battery or unregulated voltage c1 1  c2 1  off on 1 2 3 5 4 figure 1. typical application diagram see detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet. ordering information pin connections 1 3 nc v in 2 gnd enable 4 v out 5 sc ? 88a (top view) xxx = specific device code m = date code*  = pb ? free package marking diagram http://onsemi.com 1 2 3 4 5 sc70 ? 5/sc ? 88a/sot ? 353 sq suffix case 419a 1 5 xxx m   http://onsemi.com (note: microdot may be in either location) m *date code orientation and/or position may vary depending upon manufacturing location. 1 3 enable v out 2 nc gnd 4 v in 6 wdfn6 (top view) wdfn6 mn suffix case 511bj x = specific device code m = date code  = pb ? free package nc 5 x m   1 (note: microdot may be in either location)
ncp508 http://onsemi.com 2 pin function description pin no. pin name description 1 v in positive power supply input voltage 2 gnd power supply ground 3 enable this input is used to place the device into low ? power stand by. when this input is pulled low, the device is disabled. if this function is not used, enable should be connected to v in . 4 n/c not connected pin 5 v out regulated output voltage maximum rating rating symbol value unit input voltage v in(max) 13.0 v enable voltage enable ? 0.3 to v in(max) + 0.3 v output voltage v out ? 0.3 to v in(max) + 0.3 v power dissipation and thermal characteristics (sc ? 88a) power dissipation thermal resistance, junction ? to ? ambient (note 4) p d r  ja internally limited 200 w c/w power dissipation and thermal characteristics (wdfn6) power dissipation thermal resistance, junction ? to ? ambient (note 4) p d r  ja internally limited 313 w c/w maximum junction temperature t j +125 c operating ambient temperature t a ? 40 to +85 c storage temperature t stg ? 55 to +150 c lead soldering temperature @ 260 c t solder 10 sec stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. this device series contains esd protection and exceeds the following tests: human body model 2000 v per mil ? std ? 883, method 3015. machine model method 200 v 2. latch up capability (85 c)  100 ma dc with trigger voltage 3. maximum package power dissipation limits must be observed. p d  t j ( max )  t a r  ja 4. r  ja on a 30 x 30 mm pcb cu thickness 1 oz; t a = 25 c. recommended operating conditions rating symbol max unit maximum operating input voltage v in 7.0 v
ncp508 http://onsemi.com 3 electrical characteristics (v in = v out(nom) + 1.0 v, v enable = v in , c in = 1.0  f, c out = 1.0  f, t j = 25 c, unless otherwise noted) characteristic symbol min typ max unit output voltage tolerance (t a = 25 c, i out = 10 ma) v out ? 2 ? +2 % output voltage tolerance (t a = ? 40 c to 85 c, i out = 10 ma) v out ? 3 ? +3 % line regulation (v in = v out + 1 v to 12 v, i out = 10 ma) (note 5) reg line ? 2 20 mv load regulation (i out = 1.0 ma to 50 ma) (note 5) reg load ? 6 40 mv output current (v out = v out(nom) ? 0.1 v) i out(nom) 50 ? ? ma dropout voltage (v out = 3.0 v, measured at v out ? 100 mv) i out = 30 ma i out = 40 ma i out = 50 ma v in ? v out ? ? ? 140 155 180 250 300 ? mv quiescent current (enable input = 0v) i q ? 0.1 1  a ground current (enable input = v in , v in = v out + 1 v, i out = 0 ma) (enable input = v in , i out = 1 ma) (enable input = v in , i out = 10 ma) (enable input = v in , i out = 50 ma) i gnd ? ? ? ? 145 160 300 1100 200 260 500 1900  a enable input threshold voltage (voltage increasing, output turns on, logic high) (voltage decreasing, output turns off, logic low) v th(en) 0.9 ? ? ? ? 0.15 v enable input current (v enable = 2.4 v) i enable ? 8.0 15  a output turn on time (note 6) ? ? 20 ?  s output short circuit current limit (v out = 0 v) i out(max) 100 250 ? ma ripple rejection (v in = v out(nom) + 1 vdc + 0.5 v pp , f = 1 khz, io = 10 ma) rr ? 70 ? db output noise voltage (f = 100 hz to 100 khz) (v out = 1.5 v) v n ? 39 ?  vrms 5. low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 6. turn on time is defined from enable at 10% to v out at 95% nominal value. min and max values t a = ? 40 c to 85 c, t jmax = 125 c. v enable = 0 v to v in . c out = 1.0  f.
ncp508 http://onsemi.com 4 typical characteristics 0 50 100 150 200 250 300 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) v in ? v out , dropout voltage (mv) figure 2. dropout voltage vs. temperature, 1.5 v v out = v out(nom) ? 0.1 v i load = 40 ma 0 50 100 150 200 250 300 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) figure 3. dropout voltage vs. temperature, 3.3 v v in ? v out , dropout voltage (mv) v out = v out(nom) ? 0.1 v i load = 40 ma 1.49 1.492 1.494 1.496 1.498 1.5 1.502 1.504 1.506 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) figure 4. output voltage vs. temperature, 1.5 v v out , output voltage (v) v out = v out(nom) + 1 v i load = 1 ma 3.29 3.295 3.3 3.305 3.31 3.315 3.32 ? 40 ? 20 0 20 40 60 80 100 120 temperature ( c) figure 5. output voltage vs. temperature, 3.3 v v out , output voltage (v) v out = v out(nom) + 1 v i load = 1 ma 150 160 170 180 190 200 210 220 230 temperature ( c) figure 6. output current limit vs. temperature, 1.5 v i out , output current (ma) v out = v out(nom) ? 0.1 v ? 40 ? 20 0 20 40 60 80 100 120 0 50 100 150 200 250 temperature ( c) figure 7. output current limit vs. temperature, 3.3 v ? 40 ? 20 0 20 40 60 80 100 120 i out , output current (ma) v out = v out(nom) ? 0.1 v
ncp508 http://onsemi.com 5 typical characteristics 150 170 190 210 230 250 270 290 310 330 temperature ( c) figure 8. short ? circuit current limit vs. temperature, 1.5 v i out(max) , short ? circuit cur- rent (ma) ? 40 ? 20 0 20 40 60 80 100 120 v out = 0 v 0 50 100 150 200 250 300 350 400 temperature ( c) figure 9. short ? circuit current limit vs. temperature, 3.3 v ? 40 ? 20 0 20 40 60 80 100 120 i out(max) , short ? circuit cur- rent (ma) v out = 0 v 0 50 100 150 200 250 300 temperature ( c) figure 10. quiescent current vs. temperature, 1.5 v i q , quiescent current (na) ? 40 ? 20 0 20 40 60 80 100 120 v en = 0 v 0 50 100 150 200 250 300 350 400 450 temperature ( c) figure 11. quiescent current vs. temperature, 3.3 v ? 40 ? 20 0 20 40 60 80 100 120 i q , quiescent current (na) v en = 0 v 120 125 130 135 140 145 temperature ( c) figure 12. ground current vs. temperature, 1.5 v i gnd , ground current (  a) ? 40 ? 20 0 20 40 60 80 100 120 v in = v out + 1 v i out = 0 ma 128 130 132 134 136 138 140 142 144 146 temperature ( c) figure 13. ground current vs. temperature, 3.3 v ? 40 ? 20 0 20 40 60 80 100 120 v in = v out + 1 v i out = 0 ma i gnd , ground current (  a)
ncp508 http://onsemi.com 6 typical characteristics 0 50 100 150 200 250 300 350 400 012345678910111213 1v5, no load 2v8, no load 3v3, no load v in , input voltage (v) figure 14. quiescent current vs. input voltage i in , (  a) 250 300 350 400 450 500 2 3 4 5 6 7 8 9 10 11 12 13 v in , input voltage (v) figure 15. output short ? circuit current vs. input voltage i short , (ma) v en = v in i out = 0 ma c in = c out = 1  f t a = 25 c v en = v in v out = 0 ma voltage option = 1.5 v c in = c out = 1  f t a = 25 c 0 20 40 60 80 100 120 140 160 180 200 220 240 0 0.01 0.02 0.03 0.04 0.05 3v3 3v 2v8 2v5 1v5 1v8 i out , output current (a) dropout voltage (mv) figure 16. dropout voltage vs. output current c in = c out = 1  f t a = 25 c
ncp508 http://onsemi.com 7 typical characteristics 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 024681012 v in , input voltage (v) figure 17. output voltage vs. input voltage v out , output voltage (v) i out = 1.0 ma to 50 ma v en = v in v out = 1.5 v c in = c out = 1  f t a = 25 c 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 024681012 i out = 1.0 ma to 50 ma v en = v in v out = 3.3 v c in = c out = 1  f t a = 25 c v in , input voltage (v) figure 18. output voltage vs. input voltage v out , output voltage (v) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 0 0.05 0.1 0.15 0.2 0.25 0.3 v in = 2.5 v v en = v in v out = 1.5 v c in = c out = 1  f t a = 25 c i out , output current (a) figure 19. output voltage vs. output current v out , output voltage (v) 0 0.4 0.8 1.2 1.6 2 2.4 2.8 3.2 3.6 0 0.05 0.1 0.15 0.2 0.25 0.3 v in = 4.3 v v en = v in v out = 3.3 v c in = c out = 1  f t a = 25 c v out , output voltage (v) i out , output current (a) figure 20. output voltage vs. output current i out , output current (ma) figure 21. equivalent series resistance vs. output current, x7r, mlcc capacitor esr, equivalent series resistance (  ) region of instability region of stability c in = c out = 1  f t a = 25 c 0 2 4 6 8 10 12 14 16 0 5 10 15 20 25 30 35 40 45 50
ncp508 http://onsemi.com 8 typical characteristics v out = 1.5 v v in = 2.5 v to 3.5 v /rate 1 v/  s i load = 40 ma c out = 1  f mlcc input voltage (v) output voltage deviation (mv) figure 22. line transient response 1.5 v/40 ma 3.5 2.5 60 mv 30 mv 0 ? 30 mv ? 60 mv load current (ma) v out = 1.5 v v in = 2.5 v i load = 1 to 50 ma c out = 1 uf mlcc output voltage deviation (mv) figure 23. load transient response 1.5 v 20 mv 10 mv 0 ? 10 mv ? 20 mv ? 30 mv v out = 1.5 v v in = 2.5 v to 3.5 v /rate 1 v/  s i load = 50 ma c out = 4.7  f mlcc input voltage (v) output voltage deviation (mv) 3.5 2.5 20 mv 10 mv 0 ? 10 mv ? 20 mv figure 24. line transient response 1.5 v/50 ma
ncp508 http://onsemi.com 9 typical characteristics output voltage deviation (mv) load current (ma) v out = 3.3 v v in = 4.3 v i load = 1 to 40 ma c out = 1  f mlcc figure 25. load transient response 3.3 v 20 mv 10 mv 0 ? 10 mv ? 20 mv ? 30 mv output voltage deviation (mv) v out = 3.3 v v in = 4.3 v to 5.3 v /rate 1 v/  s i load = 40 ma c out = 1  f mlcc input voltage (v) 5.3 4.3 40 mv 20 mv 0 ? 20 mv ? 40 mv figure 26. line transient response 3.3 v/40 ma output voltage deviation (mv) input voltage (v) v out = 3.3 v v in = 4.3 v to 5.3 v /rate 1 v/  s i load = 50 ma c out = 4.7  f mlcc 5.3 4.3 20 mv 10 mv 0 figure 27. line transient response 3.3 v/50 ma ? 10 mv ? 20 mv
ncp508 http://onsemi.com 10 typical characteristics 0.0 0.5e ? 07 1.0e ? 07 1.5e ? 07 2.0e ? 07 2.5e ? 07 3.0e ? 07 10 100 1000 10000 100000 1000000 frequency (hz) figure 28. output voltage noise v out = 1.5 v, i out = 40 ma (nv/ hz ) 0 10 20 30 40 50 60 70 80 90 10 100 1000 10000 100000 1000000 r r , ripple rejection (db) f ripple , ripple frequency (hz) figure 29. ripple rejection vs. frequency i out = 40 ma, 0.5 v pp 3.3 v 2.5 v 1.5 v rms noise value (100 hz ? 100 khz) = 39  v i out = no load c in = c out = 1  f v in = v en = 2.8 v v out = 1.8 v t a = 25 c i in v in = v en v out figure 30. startup, no load v in = v en v out i in figure 31. startup, i out = 50 ma i out = 50 ma c in = c out = 1  f v in = v en = 2.8 v v out = 1.8 v t a = 25 c
ncp508 http://onsemi.com 11 c in = c out = 1  f v in = v en = 2.8 v v out = 2.5 v t a = 25 c i limit = 180 ma figure 32. hard short ? circuit current (by copper wires) 500 ms/div 50 ma/div 0 0.01 0.02 0.03 0.04 0.05 0.06 0 1 2 3 4 5 6 7 8 9 10 11 12 13 figure 33. measured power operating area, 1.5 v, t a = 85  c, v out_drop = max 0.1 v i out , output current (a) v in , input voltage (v) 33 x 26 mm figure 34. evaluation board 0 50 100 150 200 250 300 350 0 100 200 300 400 500 600 700 800 900 1000 0 0.05 0.1 0.15 0.2 0.25  ja ( c/w) copper heat spreader area (mm 2 ) p d  ja figure 35. sc70 ? 5 thermal resistance vs. copper heat spreader area v en = v in c in = c out = 1  f t a = 85 c max power dissipation (w) pcb copper thickness = 1.0 oz 50 100 150 200 250 300 400 0 100 200 300 400 500 600 700 800 900  ja ( c/w) pcb copper heat spreader area (mm 2 ) figure 36. wdfn6 thermal resistance vs. copper heat spreader area 350 pcb copper thickness = 1.0 oz
ncp508 http://onsemi.com 12 definitions load regulation the change in output voltage for a change in output current at a constant temperature. dropout voltage the input/output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. measured when the output drops 100 mv below its nominal. the junction temperature, load current, and minimum input supply requirements affect the dropout level. maximum power dissipation the maximum total dissipation for which the regulator will operate within its specifications. quiescent current the quiescent current is the current which flows through the ground when the ldo operates without a load on its output: internal ic operation, bias, etc. when the ldo becomes loaded, this term is called the ground current. it is actually the difference between the input current (measured through the ldo input pin) and the output current. line regulation the change in output voltage for a change in input voltage. the measurement is made under conditions of low dissipation or by using pulse technique such that the average chip temperature is not significantly affected. line transient response typical over and undershoot response when input voltage is excited with a given slope. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 125 c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the maximum power package dissipation is the power dissipation level at which the junction temperature reaches its maximum operating value, i.e. 150 c. depending on the ambient power dissipation and thus the maximum available output current. applications information typical application circuit for the ncp508 series is shown in figure 1. input decoupling (c1) an input capacitor of at least 1.0  f,(ceramic or tantalum) is recommended to improve the transient response of the regulator and/or if the regulator is located more than a few inches from the power source. it will also reduce the circuit?s sensitivity to the input line impedance at high frequencies. the capacitor should be mounted with the shortest possible track length directly across the regular?s input terminals. higher values and lower esr will improve the overall line transient response. output decoupling (c2) the ncp508 is a stable regulator and does not require a minimum output current. capacitors exhibiting esrs ranging from a few m  up to 3  can safely be used. the minimum decoupling value is 1.0  f and can be augmented to fulfill stringent load transient requirements. the regulator accepts ceramic chip capacitors as well as tantalum devices. larger values improve noise rejection and load regulation transient response. enable operation the enable pin will turn on or off the regulator. the limits of threshold are covered in the electrical specification section of this datasheet. if the enable is not used then the pin should be connected to v in . hints please be sure the v in and gnd lines are suf ficiently wide. when the impedance of these lines is high, there is a chance to pick up noise or cause the regulator to malfunction. set external components, especially the output capacitor, as close as possible to the circuit, and make leads as short as possible. thermal considerations internal thermal limiting circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material and also the ambient temperature effect the rate of temperature rise for the part. this is stating that when the ncp508 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power dissipation applications. the maximum dissipation the package can handle is given by: (eq. 1) p d  t j ( max )  t a r  ja where: ? t j{max) is the maximum allowable junction temperature of the die, which is 150 c ? t a is the ambient operating temperature ? r  ja is dependent on the surrounding pcb layout
ncp508 http://onsemi.com 13 ordering information device nominal output voltage marking package shipping ? ncp508sq15t1g 1.5 d5a sc ? 88a (pb ? free) 3000 / tape & reel ncp508sq18t1g 1.8 d5c sc ? 88a (pb ? free) 3000 / tape & reel ncp508sq25t1g 2.5 d5d sc ? 88a (pb ? free) 3000 / tape & reel ncp508sq28t1g 2.8 d5e sc ? 88a (pb ? free) 3000 / tape & reel ncp508sq30t1g 3.0 d5f sc ? 88a (pb ? free) 3000 / tape & reel ncp508sq33t1g 3.3 d5g sc ? 88a (pb ? free) 3000 / tape & reel ncp508mt15tbg 1.5 b wdfn6 (pb ? free) 3000 / tape & reel ncp508mt18tbg 1.8 a wdfn6 (pb ? free) 3000 / tape & reel ncp508mt25tbg 2.5 c wdfn6 (pb ? free) 3000 / tape & reel NCP508MT28TBG 2.8 d wdfn6 (pb ? free) 3000 / tape & reel ncp508mt30tbg 3.0 e wdfn6 (pb ? free) 3000 / tape & reel ncp508mt33tbg 3.3 f wdfn6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. note: additional voltages in 100 mv steps are available upon request by contacting your on semiconductor representative.
ncp508 http://onsemi.com 14 package dimensions sc70 ? 5, sc ? 88a, sot ? 353 sq suffix case 419a ? 02 issue j 0.65 0.025 0.65 0.025 0.50 0.0197 0.40 0.0157 1.9 0.0748  mm inches  scale 20:1 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. soldering footprint* notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. 419a ? 01 obsolete. new standard 419a ? 02. 4. dimensions a and b do not include mold flash, protrusions, or gate burrs. dim a min max min max millimeters 1.80 2.20 0.071 0.087 inches b 1.15 1.35 0.045 0.053 c 0.80 1.10 0.031 0.043 d 0.10 0.30 0.004 0.012 g 0.65 bsc 0.026 bsc h --- 0.10 --- 0.004 j 0.10 0.25 0.004 0.010 k 0.10 0.30 0.004 0.012 n 0.20 ref 0.008 ref s 2.00 2.20 0.079 0.087 b 0.2 (0.008) mm 12 3 4 5 a g s d 5 pl h c n j k ? b ?
ncp508 http://onsemi.com 15 package dimensions wdfn6 1.5x1.5, 0.5p case 511bj ? 01 issue b mounting footprint* dimensions: millimeters 0.73 6x 0.35 5x 1.80 0.50 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. recommended 0.83 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30mm from terminal tip. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d e 0.10 c a3 a a1 2x 2x 0.10 c dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.20 0.30 d e e l pin one reference 0.05 c 0.05 c a 0.10 c note 3 l2 e b b 3 6 6x 1 4 0.05 c l1 1.50 bsc 1.50 bsc 0.50 bsc 0.40 0.60 --- 0.15 bottom view l 5x l1 detail a l alternate terminal constructions ??? l2 0.50 0.70 top view b side view note 4 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncp508/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative


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